| Survrillance System觀測系統技術報告（巴基斯坦國立科技大學）——第三屆OpenHW開放源碼硬件與嵌入式大賽決賽作品 | |
| 所屬分類：參考設計 | |
| 上傳者：chenyy | |
| 文檔大?。?span>1684 K | |
| 標簽： FPGA | |
| 所需積分：0分積分不夠怎么辦？ | |
| 文檔介紹：The project deals with the development of an memory efficient embedded real time surveillance system that is capable of video acquisition, motion detection, video display and video storage. It has a camera interfaced with an FPGA that captures the video in real time. The hardware software co-design approach is used to develop the system on Virtex-II PRO and VDEC video decoder board. The video is processed inside an FPGA and converted into two specific formats(RGB and Grayscale) for video display and video processing. Video processing is done to perform the motion detection on the incoming frames by using the sum of absolute difference algorithm. Due to limited internal memory (BRAMS) video compression is performed on the incoming frames for the video processing part. This system is capable of recording motion whenever it senses motion in the field view of camera by using video processing technique and save the motion detected video to Digital video recorder (DVR) and displays it on monitor. Its other feature | |
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